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precision, low noise, cmos, rail-to-rail, input/output operational amplifiers data sheet ad8605/ad8606/ad8608 rev. n document feedback information furnished by analog devices is believed to be accurate and reliable. however, no responsibility is assumed by analog devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. specifications subject to change without notice. no license is granted by implication or otherwise under any patent or patent rights of analog devices. trademarks and registered trademarks are the property of their respective owners. one technology way, p.o. box 9106, norwood, ma 02062-9106, u.s.a. tel: 781.329.4700 ?2002C2013 analog devices, inc. all rights reserved. technical support www.analog.com features low offset voltage: 65 v maximum low input bias currents: 1 pa maximum low noise: 8 nv/hz wide bandwidth: 10 mhz high open-loop gain: 1000 v/mv unity gain stable single-supply operation: 2.7 v to 5.5 v 5-ball wlcsp for single ( ad8605 ) and 8-ball wlcsp for dual ( ad8606 ) applications photodiode amplification battery-powered instrumentation multipole filters sensors barcode scanners audio general description the ad8605 , ad8606 , and ad8608 1 are single, dual, and quad rail-to-rail input and output, single-supply amplifiers. they feature very low offset voltage, low input voltage and current noise, and wide signal bandwidth. they use the analog devices, inc. patented digitrim? trimming technique, which achieves superior precision without laser trimming. the combination of low offsets, low noise, very low input bias currents, and high speed makes these amplifiers useful in a wide variety of applications. filters, integrators, photodiode amplifiers, and high impedance sensors all benefit from the combination of performance features. audio and other ac applications benefit from the wide bandwidth and low distortion. applications for these amplifiers include optical control loops, portable and loop-powered instrumentation, and audio amplification for portable devices. the ad8605 , ad8606 , and ad8608 are specified over the extended industrial temperature range (?40c to +125c). the ad8605 single is available in 5-lead sot-23 and 5-ball wlcsp packages. the ad8606 dual is available in an 8-lead msop, an 8-ball wlscp, and a narrow soic surface-mounted package. the ad8608 quad is available in a 14-lead tssop package and a narrow 14-lead soic package. the 5-ball and 8-ball wlcsp offer the smallest available footprint for any surface-mounted operational amplifier. the wlcsp, sot-23, msop, and tssop versions are available in tape-and-reel only. 1 protected by u.s. patent no. 5,969,657. pin configurations 1 2 3 5 4 ?in +in v+ out ad8605 top view (not to scale) v? 0 2731-001 02731-057 top view (ball side down) ball a 1 corner a1 a2 a3 b1 b3 c1 c2 c3 ad8606 +ina v? +inb ?ina ?inb outa v+ outb figure 1. 5-lead sot-23 (rj suffix) figure 2. 8-ball wlcsp (cb suffix) ad8605 only out v+ v? +in ?in 1 3 5 4 2 top view (bump side down) 02731-006 ?in a +in a v+ +in b ?in b o ut b out d ?in d +in d v? +in c ?in c out c out a 1 2 3 4 5 6 7 14 13 12 11 10 9 8 02731-004 ad8608 top view (not to scale) figure 3. 5-ball wlcsp (cb suffix) figure 4. 14-lead soic_n (r suffix) ?in a +in a v? out b ?in b +in b v+ 18 o ut a 45 02731-003 ad8606 top view (not to scale) out a ?in a +in a v+ +in b ?in b o ut b ?in d +in d v? out d ?in c out c +in c 14 8 1 7 02731-002 ad8608 top view (not to scale) figure 5. 8-lead msop (rm suffix), 8-lead soic_n (r suffix) figure 6. 14-lead tssop (ru suffix)
ad8605/ad8606/ad8608 data sheet rev. n | page 2 of 24 table of contents features .............................................................................................. 1 applications ....................................................................................... 1 general description ......................................................................... 1 pin configurations ........................................................................... 1 revision history ............................................................................... 3 5 v electrical specifications ............................................................ 4 2.7 v electrical specifications ......................................................... 6 absolute maximum ratings ............................................................ 8 esd caution .................................................................................. 8 typical performance characteristics ............................................. 9 applications information .............................................................. 16 output phase reversal ............................................................... 16 maximum power dissipation ................................................... 16 input overvoltage protection ................................................... 16 thd + noise ............................................................................... 16 to tal noise including source resistors ................................... 17 channel separation .................................................................... 17 capacitive load drive ............................................................... 17 light sensitivity .......................................................................... 18 wlcsp assembly considerations ........................................... 18 i - v conversion applications ........................................................ 19 photodiode preamplifier applications .................................... 19 audio and pda applications ................................................... 19 instrumentatio n amplifiers ...................................................... 20 dac conversion ........................................................................ 20 outline dimensions ....................................................................... 21 ordering guide .......................................................................... 24
data sheet ad8605/ad8606/ad8608 rev. n | page 3 of 24 revision history 4 /13 rev. m to rev. n changes to input overvoltage section and thd + noise section ......................................................................................... 16 changes to total noise including source resistors section ...... 17 updated outline dimensions ................................................... 24 2 /1 3 rev. l to re v. m updated outline dimensions ................................................... 21 changes to ordering guide ...................................................... 24 2 /12 rev. k to rev. l change d f unctional b lock d iagrams section to pin configuration section ................................................................. 1 changes to figure 11 ................................................................... 9 added figure 33 ......................................................................... 13 8/1 1 rev. j to rev. k changes to figure 20 ................................................................... 2 update d ou tline dimensions ................................................... 20 changes to ordering guide ...................................................... 23 8/10 rev. i to rev. j changes to figure 10 and figure 11 .......................................... 9 changes to figure 15 ................................................................. 10 changes to figure 36 ................................................................. 13 changes to figure 42 ................................................................. 14 updated outline dimensions ................................................... 20 changes to ordering guide ...................................................... 23 9/08 rev. h to re v. i changes to input overvoltage protection section ................ 1 5 changes to ordering guide ...................................................... 22 2/08 rev. g to rev. h changes to features ..................................................................... 1 changes to table 1 ....................................................................... 4 changes to table 2 ....................................................................... 6 changes to figure 11 ................................................................... 9 changes to figure 13, fig ure 14, and figure 16 captions .... 10 cha nges to figure 15, figure 17, and figure 18 ..................... 10 changes to fig ure 34 and figure 35 captions ........................ 13 changes to figure 36 ................................................................. 13 changes to figure 37 caption .................................................. 1 4 changes to figure 38 and figure 41 ........................................ 1 4 changes to figure 45 ................................................................. 1 5 changes to audio and pda applications sectio n ................. 1 8 changes to figure 52 ................................................................. 1 8 changes to ordering guide ...................................................... 22 10/07 rev. f to rev. g changes to figure 2 ...................................................................... 1 updated outline dimensions ................................................... 20 8 /0 7 rev. e to rev. f added 8 - ball wlcsp package ..................................... universal changes to features ..................................................................... 1 changes to table 1 ....................................................................... 3 changes to table 2 ........................................................................ 5 changes to table 4 ........................................................................ 7 updated outline dimensions ................................................... 19 changes to ordering guide ...................................................... 21 1/06 rev. d to rev. e changes to table 1 ........................................................................ 3 changes to table 2 ........................................................................ 5 changes to table 4 ........................................................................ 6 changes to figure 12 caption ..................................................... 8 changes to figure 26 and figure 27 captions ....................... 11 changes to fi gure 33 caption .................................................. 12 changes to figure 44 ................................................................. 14 updated outline dimensions ................................................... 19 changes to ordering guide ...................................................... 20 5/04 rev. c to rev. d updated format ............................................................. universal edit to light sensitivity section ............................................... 16 updated outline dimensions ................................................... 19 changes to ordering guide ...................................................... 20 7/03 rev. b to rev. c changes to features ....................................................................... 1 change to general description .................................................... 1 addition to functional block diagrams ..................................... 1 addition to absolute maximum ratings .................................... 4 addition to ordering guide ......................................................... 4 change to equation in maximum power dissip ation section .......................................................................................... 11 added light sensitivity sectio n ................................................ 12 added new figure 8; renumbered subsequent ly .................. 13 added new microcsp assembly considerations section .... 13 changes to figure 9 .................................................................... 13 change to equation in photodiode preamplifier applications section .................................................................. 13 changes to figure 12 .................................................................. 14 change to equation in d/ a conversion section .................... 14 updated outline dimensions ................................................... 15 3/03 rev. a to rev. b changes to functional block diagram ....................................... 1 changes to absolute maximum ratings ..................................... 4 changes to ordering guide ........................................................ 4 changes to figure 9 ................................................................... 13 updated outline dimensions .................................................... 15 11/02 rev. 0 to rev . a change to electrical characteristics ............................................ 2 changes to absolute maximum ratings ..................................... 4 changes to ordering guide ......................................................... 4 change to tpc 6 ........................................................................... 5 updated outline dimensions .................................................... 15 5/02 revision 0: initial version
ad8605/ad8606/ad8608 data sheet rev. n | page 4 of 24 5 v electrical speci fications v s = 5 v, v cm = v s /2, t a = 25c, unless otherwise noted. table 1 . parameter symbol conditions min typ max unit input characteristics offset voltage v os ad8605 / ad8606 ( e xcept wlcsp) v s = 3.5 v, v cm = 3 v 20 65 v ad8608 v s = 3.5 v, v cm = 2.7 v 20 75 v ad8605 / ad8606 / ad8608 v s = 5 v, v cm = 0 v to 5 v 80 300 v ? 40c < t a < +125c 750 v input bias current i b 0.2 1 pa ad8605 / ad8606 ? 40c < t a < +85c 50 pa ad8605 / ad8606 ? 40c < t a < +125c 250 pa ad8608 ? 40c < t a < +85c 100 pa ad8608 ? 40c < t a < +125c 300 pa input offset current i os 0.1 0.5 pa ? 40c < t a < +85c 20 pa ? 40c < t a < +125c 75 pa input voltage range 0 5 v common - mode rejection ratio cmrr v cm = 0 v to 5 v 85 100 db ? 40c < t a < +125c 75 90 db large signal voltage gain a vo r l = 2 k?, v o = 0.5 v to 4.5 v 300 1000 v/mv offset voltage drift ad 8605/ ad8606 v os /t ? 40c < t a < +125c 1 4.5 v/c ad8608 v os /t ? 40c < t a < +125c 1.5 6.0 v/c input capacitance common - mode input capacitance c com 8.8 pf differential input capacitance c diff 2.6 pf output characteristics output voltage high v oh i l = 1 ma 4.96 4.98 v i l = 10 ma 4.7 4.79 v ? 40c < t a < +125c 4.6 v outpu t voltage low v ol i l = 1 ma 20 40 mv i l = 10 ma 170 210 mv ? 40c < t a < +125c 290 mv output current i out 80 ma closed - loop output impedance z out f = 1 mhz, a v = 1 1 ? power supply power supply rejection rati o psrr ad8605 / ad8606 v s = 2.7 v to 5.5 v 80 95 db ad8605 / ad8606 wlcsp v s = 2.7 v to 5.5 v 75 92 db ad8608 v s = 2.7 v to 5.5 v 77 92 db ? 40c < t a < +125c 70 90 db supply current/amplifier i sy i out = 0 ma 1 1.2 ma ? 40c < t a < +125c 1.4 ma dynamic performance slew rate sr r l = 2 k? , c l = 16 pf 5 v/s settling time t s to 0.01%, 0 v to 2 v step , a v = 1 <1 s unity gain bandwidth product gbp 10 mhz phase margin m 65 degrees
data sheet ad8605/ad8606/ad8608 rev. n | page 5 of 24 parameter symbol conditions min typ max unit noise performance peak -to - peak noise e n p - p f = 0.1 hz to 10 hz 2.3 3.5 v p -p voltage noise density e n f = 1 khz 8 12 nv/hz e n f = 10 kh z 6.5 nv/hz current noise density i n f = 1 khz 0.01 pa/hz
ad8605/ad8606/ad8608 data sheet rev. n | page 6 of 24 2.7 v electrical spe cifications v s = 2.7 v, v cm = v s /2, t a = 25c, unless otherwise noted. table 2 . parameter symbol conditions min typ max unit input characteristics offset voltage v os ad8605 / ad8606 ( e xcept wlcsp) v s = 3.5 v, v cm = 3 v 20 65 v ad8608 v s = 3.5 v, v cm = 2.7 v 20 75 v ad8605 / ad8606 / ad8608 v s = 2.7 v, v cm = 0 v to 2.7 v 80 300 v ? 40c < t a < +125c 750 v input bias current i b 0.2 1 pa ad8605 / ad8606 ? 40c < t a < +85c 50 pa ad8605 / ad8606 ? 40c < t a < +125c 250 pa ad8608 ? 40c < t a < +85c 100 pa ad8608 ? 40c < t a < +125c 300 pa input offset current i os 0.1 0.5 pa ? 40c < t a < +85c 20 pa ? 40c < t a < +125c 75 pa input voltage range 0 2.7 v common - mode rejection ratio cmrr v cm = 0 v to 2.7 v 80 95 db ? 40c < t a < +125c 70 85 db large signal voltage gain a vo r l = 2 k?, v o = 0.5 v to 2.2 v 110 350 v/mv offset vol tage drift ad8605 / ad8606 v os /t ? 40c < t a < +125c 1 4.5 v/c a d8608 v os /t ? 40c < t a < +125c 1.5 6.0 v/c input capacitance common - mode input capacitance c com 8.8 pf differential input capacitance c diff 2.6 pf output characteristics output voltage high v oh i l = 1 ma 2.6 2. 66 v ? 40c < t a < +125c 2.6 v output voltage low v ol i l = 1 ma 25 40 mv ? 40c < t a < +125c 50 mv output current i out 30 ma closed - loop output impedance z out f = 1 mhz, a v = 1 1.2 ? power supply power sup ply rejection ratio psrr ad8605 / ad8606 v s = 2.7 v to 5.5 v 80 95 db ad8605 / ad8606 wlcsp v s = 2.7 v to 5.5 v 75 92 db ad8608 v s = 2.7 v to 5.5 v 77 92 db ? 40c < t a < +125c 70 90 db supply current/amplifier i sy i out = 0 ma 1.15 1.4 ma ? 40c < t a < +125c 1.5 ma dynamic performance slew rate sr r l = 2 k? , c l = 16 pf 5 v/s settling time t s to 0.01%, 0 v to 1 v step , a v = 1 <0.5 s unity gain bandwidth product gbp 9 mhz phase margin m 50 degrees
data sheet ad8605/ad8606/ad8608 rev. n | page 7 of 24 parameter symbol conditions min typ max unit noise performance peak -to - peak noise e n p - p f = 0.1 hz to 10 hz 2.3 3.5 v p -p voltage noise density e n f = 1 khz 8 12 nv/ hz e n f = 10 khz 6.5 nv/ hz current noise density i n f = 1 khz 0.01 pa/ hz
ad8605/ad8606/ad8608 data sheet rev. n | page 8 of 24 absolute maximum rat ings table 3 . parameter rating supply voltage 6 v input voltage gnd to v s differential input voltage 6 v output short - circ uit duration to gnd observe derating curves storage temperature range all packages ? 65c to +150c operating temperature range all packages ? 40c to +125c junction temperature range all packages ? 65c to +150c lead temperature (soldering, 60 se c) 300c stresses above those listed under absolute maximum ratings may cause permanent damage to the device. this is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational sectio n of this specification is not implied. exposure to absolute maximum rating conditions for extended periods may affect device reliability. table 4 . package type ja 1 jc unit 5 -b all wlcsp (cb) 170 c/w 5 - lead sot - 23 (rj) 240 92 c/w 8 -b all wlcsp (cb) 115 c/w 8 - lead msop (rm) 206 44 c/w 8 - lead soic_n (r) 157 56 c/w 14- lead soic_n (r) 105 36 c/w 14- lead tssop (ru) 148 23 c/w 1 ja is specified for t he worst - case conditions, that is, a device soldered in a circuit board for surface - mount packages. esd caution
data sheet ad8605/ad8606/ad8608 rev. n | page 9 of 24 typical performance characteristics offset vo lt age (v) number of amplifiers 4500 4000 0 2000 1500 1000 500 3000 2500 3500 300 ?200 ?100 0 100 200 ?300 v s = 5v t a = 25c v cm = 0v t o 5v 02731-007 figure 7 . input offset voltage distribution tcvos (v/c) 12 0 4.8 0.4 number of amplifiers 0.8 1.6 2.4 3.2 4.0 16 8 4 24 20 4.4 v s = 5v t a = ?40c t o +125c v cm = 2.5v 0 1.2 2.0 2.8 3.6 02731-008 figure 8. ad8608 input offset voltage drift distribution tcvos (v/c) 20 10 0 2.6 0.2 number of amplifiers 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0 14 6 2 2.2 2.4 12 16 8 4 18 0 v s = 5v t a = ?40c t o +125c v cm = 2.5v 02731-009 figure 9. ad8605 / ad8606 input offset voltage drift distribution 0 02731-010 ?0. 30 ?0. 25 ?0. 20 ?0. 15 ?0. 10 ?0. 05 0. 05 0. 10 0. 15 0. 20 0. 25 0. 30 0 0 .5 1.0 1 .5 2.0 2 .5 3.0 3 .5 4.0 4 .5 5.0 v cm ( v ) v os ( m v ) v s = 5v figure 10 . input offset voltage vs. common - mode voltage (200 units, 5 wafer lots, including process skews) 250 200 150 100 50 0 ?150 ?100 ?50 ?50 ?25 0 25 50 75 100 125 input bias current (pa) temperature (c) 02731-011 v sy = 5v v cm = v sy /2 ad8605 ad8606 ad8608 figure 11 . in put bias current vs. temperature load current (ma) 1k 10 0.1 0.001 10 0.01 output s a tur a tion vo lt age (mv) 0.1 1 100 1 sink source v s = 5v t a = 25c 02731-012 figure 12 . output saturation voltage vs. load current
ad8605/ad8606/ad8608 data sheet rev. n | page 10 of 24 temper a ture (c) 5.00 4.95 4.70 output vo l t age (v) 4.85 4.75 4.90 4.80 v oh @ 1m a load v s = 5v v oh @ 10m a load ?40 ?25 ?10 5 20 35 50 65 80 95 1 10 125 02731-013 figure 13 . output voltage swing high vs. temperature 0.25 0 0.15 0.05 0.20 0.10 temper a ture (c) output vo lt age (v) v ol @ 1m a load v s = 5v v ol @ 10m a load ?40 ?25 ?10 5 20 35 50 65 80 95 1 10 125 02731-014 figure 14 . output voltage s wing low vs. temperature gain (db) 100 80 ?100 60 40 20 0 ?20 ?40 ?60 ?80 225 180 ?225 135 90 45 0 ?45 ?90 ?135 ?180 phase (degrees) frequency (hz) 10k 40m 100k 1m 10m v s = 2.5v r l = 2k? c l = 20pf m = 64 02731-015 phase gain figure 15 . open - loop gain and phase vs. frequency frequenc y (hz) 6 5 0 1k 10m 10k output swing (v p-p) 100k 1m 4 3 1 2 v s = 5v v in = 4.9v p-p t a = 25c r l = 2k? a v = 1 02731-016 figure 16 . closed - loop output voltage swing (fpbw) frequenc y (hz) 100 90 0 1k 100m 10k 100k 1m 10m 80 70 20 60 50 30 10 40 v s = 5v a v = 100 a v = 1 a v = 10 02731-017 output impedance (?) figure 17 . output impedance vs. frequenc y frequenc y (hz) 10k cmrr (db) 100k 1m 20 120 1k 10m 90 80 70 60 50 40 30 1 10 100 v s = 5v 02731-018 figure 18 . common - mode rejection ratio (cmrr) vs. frequency
data sheet ad8605/ad8606/ad8608 rev. n | page 11 of 24 frequenc y (hz) 140 80 ?60 1k 10m 10k psrr (db) 100k 1m 40 0 ?40 100 120 60 20 ?20 v s = 5v 02731-019 figure 19 . psrr vs. frequency ca p aci t ance (pf) 45 40 0 10 1k 100 smal l signa l overshoot (%) 35 30 10 25 20 15 5 v s = 5v r l = t a = 25c a v = ?1 +os ?os 02731-020 figure 20 . small signal overshoot vs. load capacitance temper a ture (c) 2.0 0 supp l y current/amplifier (ma) ?40 125 ?25 ?10 95 1 10 1.5 1.0 0.5 5 20 35 50 65 80 02731-021 v s = 2.7v v s = 5v figure 21 . supply current /amplifier vs. temperature supp l y vo lt age (v) 1.0 0.4 0 supp l y current/amplifier (ma) 0.9 0.5 0.3 0.1 0.7 0.6 0.2 0.8 0 5.0 4.5 4.0 3.5 3.0 2.5 2.0 1.5 1.0 0.5 02731-022 figure 22 . supply current /amplifier vs. supply voltage time (1s/div) vo lt age noise (1v/div) v s = 5v 02731-023 figure 23 . 0.1 hz to 10 hz input voltage noise time (200ns/div) vo l t age (50mv/div) 02731-024 v s = 2.5v r l = 10k? c l = 200pf a v = 1 figure 24 . small signal transient response
ad8605/ad8606/ad8608 data sheet rev. n | page 12 of 24 time (400ns/div) volt age (1v/div) v s = 2.5v r l = 10k? c l = 200pf a v = 1 02731-025 figure 25 . large signal transient response time (400ns/div) 2.5v ?50mv 0v v out v in 0v v s = 2.5v r l = 10k? a v = ?100 v in = 50mv 02731-026 figure 26 . positive overload recovery v s = 2.5v r l = 10k? a v = ?100 v in = 50mv time (1s/div) ?2.5v 50mv 0v 0v 02731-027 figure 27 . negative overload recovery frequenc y (khz) 36 20 4 32 28 12 8 24 16 v s = 2.5v vo lt age noise densit y (nv/ hz) 0 1.0 0.9 0.8 0.7 0.6 0.5 0.4 0.3 0.2 0.1 02731-028 figur e 28 . voltage noise density vs. frequency 0 6.7 20.1 13.4 26.8 40.2 33.5 53.6 46.9 frequenc y (khz) v s = 2.5v vo lt age noise densit y (nv/ hz) 0 10 9 8 7 6 5 4 3 2 1 02731-029 figure 29 . voltage noise density vs. frequency 0 14.9 44.7 29.8 59.6 89.4 74.5 1 19.2 104.3 frequenc y (hz) v s = 2.5v vol t age noise densit y (nv/ hz) 0 100 90 80 70 60 50 40 30 20 10 02731-030 figure 30 . voltage noise density vs. frequency
data sheet ad8605/ad8606/ad8608 rev. n | page 13 of 24 1800 1600 0 number of amplifiers 800 600 400 200 1200 1000 1400 offset vo lt age (v) 300 ?200 ?100 200 ?300 v s = 2.7v t a = 25c v cm = 0v t o 2.7v 0 100 02731-031 figure 31 . input offset voltage distribution common-mode vo lt age (v) 300 200 ?300 0 2.7 input offset vo lt age (v) 100 0 ?200 ?100 1.8 0.9 0 v s = 2.7v t a = 25c 02731-032 figure 32 . input offset voltage vs. common - mode voltage (200 units, 5 wafer lots, including process skews) 250 200 150 100 50 0 ?150 ?100 ?50 ?50 ?25 0 25 50 75 100 125 input bias current (pa) temperature (c) 02731-039 v sy = 2.7v v cm = v sy /2 ad8605 ad8606 ad8608 figure 33 . input bias current vs. temperature load current (ma) 1k 10 0.1 0.001 10 0.01 output s a tur a tion vo lt age (mv) 0.1 1 100 1 source sink v s = 2.7v t a = 25c 02731-033 fi gure 34 . output saturation voltage vs. load current temper a ture (c) 2.680 2.675 2.650 5 20 125 50 35 output vo l t age (v) 65 80 95 1 10 2.665 2.655 2.670 2.660 ?10 ?25 ?40 v s = 2.7v v oh @ 1m a load 02731-034 figure 35 . output voltage swing high vs. temperature 0.045 0.025 0 0.035 0.015 0.005 0.030 0.040 0.020 0.010 temper a ture (c) 5 20 125 50 35 output vo lt age (v) 65 80 95 1 10 ?10 ?25 ?40 v s = 2.7v v ol @ 1m a load 02731-035 figure 36 . output voltage swing low vs. temperature
ad8605/ad8606/ad8608 data sheet rev. n | page 14 of 24 frequency (hz) 10k 40m 100k gain (db) 100 80 ?100 60 40 20 0 ?20 ?40 ?60 ?80 225 180 ?225 135 90 45 0 ?45 ?90 ?135 ?180 phase (degrees) 1m 10m 02731-036 v s = 2.7v r l = 2k? c l = 20pf m = 52.5 phase gain figure 37 . open - loop gain and phase vs. frequency frequenc y (hz) 3.0 2.5 0 1k 10m 10k output swing (v p-p) 100k 1m 2.0 1.5 0.5 1.0 02731-037 v s = 2.7v v in = 2.6v p-p t a = 25c r l = 2k? a v = 1 figure 38 . closed - loop output voltage swing vs. frequency (fpbw) frequenc y (hz) 100 90 0 1k 100m 10k 100k 1m 10m 80 70 20 60 50 30 10 40 a v = 100 a v = 10 a v = 1 v s = 2.7v 02731-038 output impedance (?) figure 39 . output impedance vs. frequency c a p aci t ance (pf) 60 50 0 10 1k 100 sma l l sign a l overshoot (%) 30 20 10 40 ?os +os v s = 2.7v t a = 25c a v = 1 02731-039 figure 40 . small signal overshoot vs. load capacitance time (1s/div) v s = 2.7v vol t age noise (1v/div) 02731-040 figure 41 . 0.1 hz to 10 hz input voltage noise time (200ns/div) vo l t age (50mv/div) 02731-041 v s = 1.35v r l = 10k? c l = 200pf a v = 1 figure 42 . small signal transient response
data sheet ad8605/ad8606/ad8608 rev. n | page 15 of 24 time (400ns/div) voltage (500mv/div) v s = 1.35v r l = 10k? c l = 200pf a v = 1 02731-042 figure 43 . large signal transient response
ad8605/ad8606/ad8608 data sheet rev. n | page 16 of 24 application s information output phase reversa l phase reversal is defined as a change in polarity at the output of the amplifier when a voltage that exceeds the maximum input common - mode voltage drives the input. ph ase reversal can cause permanent damage to the amplifier; it can also cause system lockups in feedback loops. the ad8605 does not exhibit phase reversal even for inputs exceeding the supply voltage by more than 2 v. maximum power dissip ation power dissipated in an ic causes the die temperature to increase , which can affect the behavior of the ic and the application circuit performance. the absolute maximum junction temperature of the ad8605 / ad8606 / ad8608 is 150c. exceeding this temperature could damage or destroy the device. the maximum power dissipation of the amplifier is calculated according to ja a j diss t t p ? = where: t j is the junction temperature . t a is the ambient temperature . ja is the junction - to - ambient thermal resistance . figure 45 compares the maximum power dissipation with temperature for the various ad860x family packages. input overvoltage pr otection the ad860 x has internal protective circuit ry. however, if the voltage applied at either input exceeds the supplies by more than 0 .5 v, external resistors should be placed in series with the inputs. the resistor values can be determined by ma 5 ? s s in r v v the remarkable low input offset cu rrent of the ad860 x (< 1 pa) allows the use of larger value resistors. with a 10 k? resistor at the input, the output voltage has less than 10 nv of error voltage. a 10 k? resistor has less than 13 nv/hz of thermal noise at room temperature. thd + noise total harmonic distortion is the ratio of the input signal in v rms to the total harmonics in v rms throughout the spectrum. harmonic distortion adds errors to precision measurements and adds unpleasant sonic artifacts to audio systems. the ad860x has a low total harmonic distortion. figure 46 shows that the ad8605 has less than 0.005% or ? 86 db of thd + n over the entire audio frequency range. the ad8605 is configured in positive unity gain, which is the worst case, and with a load of 10 k?. time (4s/div) vo lt age (2v/div) v out v in v s = 2.5v v in = 6v p-p a v = 1 r l n? 02731-043 figure 44 . no phase reversal ambient temper a ture (c) 1.0 0.8 0 ?45 130 ?20 power dissi pa tion (w) 30 80 105 0.6 0.4 0.2 1.7 1.8 1.6 1.4 1.2 02731-044 tssop-14 5 55 1.5 1.3 1.1 0.9 0.7 0.5 0.3 0.1 5-lead so t -23 msop-8 soic-14 wlcsp-5 soic-8 figure 45 . maximum power dissipation vs. ambient temperature frequenc y (hz) 0.1 0.01 0.0001 20 20k 100 thd + noise (%) 1k 0.001 10k v sy = 2.5v a v = 1 b w = 80khz 02731-045 figure 46 . thd + n oise vs. frequency
data sheet ad8605/ad8606/ad8608 rev. n | page 17 of 24 total noise includin g source resistors the low input current noise and input bias c urrent of the ad860x make it the ideal amplifier for circuits with substantial input source resistance, such as photodiodes. input offset voltage increases by less than 0.5 nv per 1 k ? of source resistance at room temperature and increases to 10 nv at 85c. the total noise density of the circuit is ( ) s s n n total n tr k r i e e 4 2 2 , + + = where: e n is the input voltage noise density of the ad860x . i n is the input current noise density of the ad860x . r s is the source resistance at the noninverting terminal. k is boltzmanns constant (1.38 10 ? 23 j/k). t is the ambient temperature in kelvin (t = 273 + c). for example, with r s = 10 k?, the total voltage noise density is roughly 15 nv/hz. for r s < 3.9 k? , e n dominates and e n, total e n . the current noise of the ad860x is so low that its total density does not become a significant term unless r s is greater than 6 m?. the total equivalent rms noise over a specific bandwidth is expressed as ( ) bw e e total n n , = where bw is the bandwidth in hertz. note that the previous analysis is valid for frequencies greater than 100 hz and assumes relatively flat noise, above 10 khz. for lower frequencies, flicker noise (1/f) must be considered. channel separation cha nnel separation, or inverse crosstalk, is a measure of the signal feed from one amplifier (channel) to another on the same ic. the ad8606 has a channel separation of greater than ? 160 db up to frequencies of 1 mhz, allowing the two amplifiers to amplify ac signals independently in most applications. capacitive load driv e the ad860 x can drive large capacitive loads without oscillation. figure 48 shows the o utput of the ad8606 in response to a 200 mv input signal. in this case, the amplifier is configured in positive unity gain, worst case for stability, while driving a 1000 pf load at its output. dr iving larger capacitive loads in unity gain can require the use of additional circuitry. a snubber network, shown in figure 49 , helps reduce the signal overshoot to a minimum and maintain stability. although this circuit does no t recover the loss of bandwidth induced by large capacitive loads, it greatly reduces the overshoot and ringing. this method does not reduce the maximum output swing of the amplifier. channe l se p ar a tion (db) frequenc y (hz) 10m 1m 100k 10k 1k 100 100m ?20 0 ?40 ?60 ?80 ?100 ?120 ?140 ?160 ?180 02731-046 figure 47 . channel separation vs. frequency time (10s/div) vo l t age (100mv/div) 02731-047 v s = 2.5v a v = 1 r l n? c l = 1000pf figure 48 . ad8606 capacitive load drive without snubber r s c s r l c l v+ v? 4 2 3 8 1 ad8605 v in 200m v 02731-049 figure 49 . snubber network configuration
ad8605/ad8606/ad8608 data sheet rev. n | page 18 of 24 figure 50 shows a scope of the output at the snubber circuit. the overshoot is reduced from over 70% to less than 5%, and the ringing is eliminated by the snubber. optimum values for r s and c s are determined experimentally. time (10s/div) vo lt a ge (100mv/div) v s = 2.5v a v = 1 r l = 10k? r s = 90? c l = 1000pf c s = 700pf 02731-048 figure 50 . capacitiv e load drive with snubber table 5 summarizes a few optimum values for capacitive loads. table 5 . c l (pf) r s (?) c s (pf) 500 100 1000 1000 70 1000 2000 60 800 an alternate technique is to insert a series resistor inside the feedback loop at the output of the amplifier. typically, the value of this resistor is approximately 100 ?. this method also reduces overshoot and ringing but causes a reduction in the maximum output swing. light sensitivity the ad8605 acb (wlcsp package option) is essentially a s ilicon die with additional post fabrication dielectric and intermetallic processing designed to contac t solder bumps on the active side of the chip. with this package type, the die is exposed to ambient light and is subject to photoelectric effects. light sensitivity analysis of the ad8605 acb mounted on standard pcb material reveals that only the input b ias current (i b ) parameter is impacted when the package is illuminated directly by high intensity light. no degradation in electrical performance is observed due to illumination by low intensity (0.1 mw/cm 2 ) ambient light. figure 5 1 shows that i b increases with increasing wavelength and intensity of incident light; i b can reach levels as high as 4500 pa at a light intensity of 3 mw/cm 2 and a wavelength of 850 nm. the light intensities shown in figure 51 ar e not normal for most applications, that is, even though direct sunlight can have intensities of 50 mw/cm 2 , office ambient light can be as low as 0.1 mw/cm 2 . w a velength (nm) 3500 0 350 input bias current (pa) 2500 3000 2000 500 1000 1500 450 550 650 750 850 1mw/cm 2 4000 4500 5000 3mw/cm 2 2mw/cm 2 02731-050 figure 51 . ad8605acb input bias current response to direct illuminatio n of varying intensity and wavelength when the wlcsp package is assembled on the board with the bump side of the die facing the pcb, reflected light from the pcb surface is incident on active silicon circuit areas and results in the increased i b . no perfo rmance degradation occurs due to illumination of the backside (substrate) of the ad8605acb. the ad8605acb is particularly sensitive to incident light with wavelengths in the near infrared range (nir, 700 nm to 1000 nm) . photons in this waveband have a long er wavelength and lower energy than photons in the visible (400 nm to 700 nm) and near ultraviolet (nuv, 200 nm to 400 nm) bands; therefore, they can penetrate more deeply into the active silicon. incident light with wavelengths gr eater than 1100 nm has no photo electric effect on the ad8605acb because silicon is transparent to wavelengths in this range. the spectral content of conventional light sources varies. sunlight has a broad spectral range, with peak intensity in the visible band that falls off in th e nuv and nir bands; fluorescent lamps have significant peaks in the visible but not the nuv or nir bands. efforts have been made at a product level to reduce the effect of ambient light; the under bump metal (ubm) has been designed to shield the sensitive circuit areas on the active side (bump side) of the die. however, if an application encounters any light sensitivity with the ad8605acb, shielding the bump side of the wlcsp package with opaque material should eliminate this effect. shielding can be accom plished using materials such as silica - filled liquid epoxies that are used in flip - chip underfill techniques. wlcsp assembly consi derations for detailed information on the wlcsp pcb assembly and reliability, see application note an - 617, microcsp wafer lev el chip scale package .
data sheet ad8605/ad8606/ad8608 rev. n | page 19 of 24 i - v conversion applica tions photodiode preamplif ier applications the low offset voltage and input current of the ad8605 make it an excellent choice for photodiode applica tions. in addition, the low voltage and current noise make the amplifier ideal for application circuits with high sensitivity. r d i d c d 50p f ad8605 v out pho t odiode v os r f 10m? c f 10pf 02731-051 figure 52 . equivalent circuit for photodiode preamp the input bias current of the amplifier contribute s an error term that is proportional to the value of r f . the offset voltage causes a dark current induced by the shunt resistance of the d iode r d . these error terms are combined at the output of the amplifier. the error voltage is written as b f d f os o i r r r v e 1 typically, r f is smaller than r d , thus r f /r d can be ignored. at room temperature, the ad8605 has an input bias current of 0.2 pa and an offset voltage of 100 v. typical values of r d are in the range of 1 g?. for the circuit shown in figure 52 , the output error voltage is approximately 100 v at room temperature, increasing to about 1 mv at 85c. t he maximum achievable signal bandwidth is f f t max c r f f s 2 where f t is the unity gain frequency of the amplifier. audio and pda applic ations the low distortion and wide dynamic range of the ad860 x make it a great choice for audio and pda applications, including microphone amplification and line output buffering. figure 53 shows a typical application circuit for headphone/ line - out amplification. r1 and r2 are used to bias the input voltage at half the supply , which maximizes the signal bandwidth range. c1 and c2 are used to ac couple th e input signal. c1, r1 , and r2 form a high - pass filter whose corner frequency is 1/[ 2 ( r1 ||r2 ) c1 ] . the high output current of the ad8606 allows it to drive heavy resistive loads. the circuit in figure 53 is tested to drive a 16 ? headphone. the thd + n is maintained at approximately ?60 db throughout the audio range. 5v 4 2 3 8 1 headphones 5v 4 6 5 8 7 c1 1f v1 500mv 1/2 ad8606 c3 100f 1/2 ad8606 c4 100f c2 1f v2 500mv 02731-052 r1 20k? r2 20k? r7 20k? r8 20k? r4 20? r3 1k? r6 20? r5 1k? figure 53 . single - supply headphone/speaker amplifier
ad8605/ad8606/ad8608 data sheet rev. n | page 20 of 24 instrumentation ampl if iers the low offset voltage and low noise of the ad8605 make it a n ideal amplifier for instrumentation applications. difference amplifiers are widely used in high accuracy circuits to improve the common - mode rejection ratio. figure 54 shows a simple difference amplifier. figure 55 shows the common - mode rejection for a unity gain configuration and for a gain of 10. making (r4/r3) = (r2/r1) and choo sing 0.01% tolerance yields a cmrr of 74 db and minimizes the gain error at the output. ad8605 5v v2 v1 r1 1k? r3 1k? r2 10k? r4 10k? v out r4 r3 r2 r1 = v out = (v2 ? v1) r2 r1 02731-053 figure 54 . difference amplifier, a v = 10 frequenc y (hz) 120 100 0 100 10m 1k cmrr (db) 10k 100k 1m 60 40 20 80 a v = 10 v sy = 2.5v a v = 1 02731-054 figure 55 . difference amplifier cmrr vs. frequency dac conversion the low input bias current and offset voltage of the ad8605 make it an excellent choice for buffering the output of a current output dac. figure 56 shows a typical implementation of the ad8605 at the output of a 12 - bit dac. the dac8143 output current is converted to a voltage by the feedback resistor. the equivalent resistance at the output of the dac varies with the input code, as does the output capacitance. r2 ad8605 v os r f c f r2 r2 v+ v? 02731-055 r r r v ref figure 56 . simplified circuit of the dac8143 with ad8605 output buffer to optimize the performance of the dac, insert a capacitor i n the feedback loop of the ad8605 to compensate the amplifier for the pole introduced by the output capacitance of the dac. typical values for c f range from 10 pf to 30 pf; it can be adjusted for t he best frequency response. the total error at the output of the op amp can be computed by 1 req r v e f os o where req is the equivalent resistance seen at the output of the dac. as previously mentioned , req is code dependent and varies with the inpu t. a typical value for req is 15 k?. choosing a feedback resistor of 10 k? yields an error of less than 200 v. figure 57 shows the implementation of a dual - stage buffer at the output of a dac. the first stage is used as a buffer . capacitor c1 with req creates a low - pass filter, and thus, provides phase lead to compensate for frequency response. the second stage of the ad8606 is used to provide voltage gain at the output of the buffer. grounding the positive input terminals in both stages reduces errors due to the common - mode output voltage. choosing r1, r2, and r3 to match within 0.01% yields a cmrr of 74 db and maintains minimum gain error in the circuit. r fb v dd db1 1 out1 ad7545 agnd r cs r p v in 15v v out v ref 1/2 ad8606 1/2 ad8606 c1 33pf 02731-056 r4 5k? r2 10k? r1 10k? r3 20k? figure 57 . bipolar operation
data sheet ad8605/ad8606/ad8608 rev. n | page 21 of 24 outline dimensions 02-15-2013-b a b c 0.610 0.555 0.500 0.230 0.200 0.170 0.940 0.900 0.860 1.330 1.290 1.250 12 bottom view (ball side up) top view (ball side down) side view 0.280 0.260 0.240 0.866 ref ball a1 identifier seating plane 0.50 bsc coplanarity 0.05 0.50 bsc figure 58. 5-ball wafer level chip scale package [wlcsp] (cb-5-1) dimensions shown in millimeters compliant to jedec standards mo-178-aa 10 5 0 seating plane 1.90 bsc 0.95 bsc 0.60 bsc 5 123 4 3.00 2.90 2.80 3.00 2.80 2.60 1.70 1.60 1.50 1.30 1.15 0.90 0 .15 max 0 .05 min 1.45 max 0.95 min 0.20 max 0.08 min 0.50 max 0.35 min 0.55 0.45 0.35 11-01-2010-a figure 59. 5-lead small outline transistor package [sot-23] (rj-5) dimensions shown in millimeters
ad8605/ad8606/ad8608 data sheet rev. n | page 22 of 24 compliant to jedec standards mo-187-aa 6 0 0.80 0.55 0.40 4 8 1 5 0.65 bsc 0.40 0.25 1.10 max 3.20 3.00 2.80 coplanarity 0.10 0.23 0.09 3.20 3.00 2.80 5.15 4.90 4.65 pin 1 identifier 15 max 0.95 0.85 0.75 0.15 0.05 10-07-2009-b figure 60 . 8 - lead mini small outline package [msop] (rm - 8) dimensions shown in millimeters c o n t r o l l i n g d i m e n s i o n s a r e i n m i l l i m e t e r s ; i n c h d i m e n s i o n s ( i n p a r e n t h e s e s ) a r e r o u n d e d - o f f m i l l i m e t e r e q u i v a l e n t s f o r r e f e r e n c e o n l y a n d a r e n o t a p p r o p r i a t e f o r u s e i n d e s i g n . c o m p l i a n t t o j e d e c s t a n d a r d s m s - 0 1 2 - a a 0 1 2 4 0 7 - a 0 . 2 5 ( 0 . 0 0 9 8 ) 0 . 1 7 ( 0 . 0 0 6 7 ) 1 . 2 7 ( 0 . 0 5 0 0 ) 0 . 4 0 ( 0 . 0 1 5 7 ) 0 . 5 0 ( 0 . 0 1 9 6 ) 0 . 2 5 ( 0 . 0 0 9 9 ) 4 5 8 0 1 . 7 5 ( 0 . 0 6 8 8 ) 1 . 3 5 ( 0 . 0 5 3 2 ) s e a t i n g p l a n e 0 . 2 5 ( 0 . 0 0 9 8 ) 0 . 1 0 ( 0 . 0 0 4 0 ) 4 1 8 5 5 . 0 0 ( 0 . 1 9 6 8 ) 4 . 8 0 ( 0 . 1 8 9 0 ) 4 . 0 0 ( 0 . 1 5 7 4 ) 3 . 8 0 ( 0 . 1 4 9 7 ) 1 . 2 7 ( 0 . 0 5 0 0 ) b s c 6 . 2 0 ( 0 . 2 4 4 1 ) 5 . 8 0 ( 0 . 2 2 8 4 ) 0 . 5 1 ( 0 . 0 2 0 1 ) 0 . 3 1 ( 0 . 0 1 2 2 ) c o p l a n a r i t y 0 . 1 0 figure 61. 8 - lead standard small outline packag e [soic_n] narrow body (r - 8) dimensions shown in millimeters and (inches)
data sheet ad8605/ad8606/ad8608 rev. n | page 23 of 24 1.480 1.430 1.380 1.825 1.775 1.725 0.27 0.24 0.21 0.380 0.355 0.330 0.340 0.320 0.300 0.675 0.595 0.515 08-10-2012- a bot t om view (bal l side up) t op view (bal l side down) side view 1.00 ref 0.50 bsc bal l a1 identifier sea ting plane coplanarity 0.05 a 1 2 3 b c figure 62 . 8 - ball wafer level chip scale package [wlcsp] (cb - 8 - 1) dimensions shown in millimeters controlling dimensions are in millimeters; inch dimensions (in p arentheses) are rounded-off millimeter equi v alents for reference on l y and are not appropri a te for use in design. compliant t o jedec s t andards ms-012-ab 060606- a 14 8 7 1 6.20 (0.2441) 5.80 (0.2283) 4.00 (0.1575) 3.80 (0.1496) 8.75 (0.3445) 8.55 (0.3366) 1.27 (0.0500) bsc sea ting plane 0.25 (0.0098) 0.10 (0.0039) 0.51 (0.0201) 0.31 (0.0122) 1.75 (0.0689) 1.35 (0.0531) 0.50 (0.0197) 0.25 (0.0098) 1.27 (0.0500) 0.40 (0.0157) 0.25 (0.0098) 0.17 (0.0067) coplanarit y 0.10 8 0 45 figure 63 . 14 - lead standard small outline package [soic_n] narrow body (r - 14) dimensions shown in millimeters and (inches)
ad8605/ad8606/ad8608 data sheet rev. n | page 24 of 24 compliant to jedec standards mo-153-ab-1 061908-a 8 0 4.50 4.40 4.30 14 8 7 1 6.40 bsc pin 1 5.10 5.00 4.90 0.65 bsc 0.15 0.05 0.30 0.19 1.20 max 1.05 1.00 0.80 0.20 0.09 0.75 0.60 0.45 coplanarity 0.10 se a ting plane figure 64 . 14 - lead thin shrink small outline package [tssop] (ru - 14) dimensions shown in millimeters and (inches) ordering guide model 1 temperature range package description package option branding ad8605acbz - reel ? 40c to +125c 5 - ball wlcsp cb -5 -1 a1j ad8605acbz - reel7 ? 40c to +125c 5 - ball wlcsp cb -5 -1 a1j ad8605art - reel ? 40c to +125c 5 - lead sot - 23 rj -5 b3a ad 8605artz - r2 ? 40c to +125c 5 - lead sot - 23 rj -5 b3a# AD8605ARTZ - reel ? 40c to +125c 5 - lead sot - 23 rj -5 b3a# AD8605ARTZ - reel7 ? 40c to +125c 5 - lead sot - 23 rj -5 b3a# ad8606arm - reel ? 40c to +125c 8 - lead msop rm - 8 b6a ad8606armz - r7 ? 40c to +125c 8 - lead msop rm - 8 b6a# ad8606armz - reel ? 40c to +125c 8 - lead msop rm - 8 b6a# ad8606ar ? 40c to +125c 8 - lead soic_n r -8 ad8606ar - reel ? 40c to +125c 8 - lead soic_n r -8 ad8606ar - reel7 ? 40c to +125c 8 - lead soic_n r -8 ad 8606arz ? 40c to +125c 8 - lead soic_n r -8 ad8606arz - reel ? 40c to +125c 8 - lead soic_n r -8 ad8606arz - reel7 ? 40c to +125c 8 - lead soic_n r -8 ad8606acbz - reel7 ? 40c to +125c 8 - ball wlcsp cb -8 -1 b 6a # ad8608arz ? 40c to +125c 14- lead soic _n r -14 ad8608arz - reel ? 40c to +125c 14- lead soic_n r -14 ad8608arz - reel7 ? 40c to +125c 14- lead soic_n r -14 ad8608aruz ? 40c to +125c 14- lead tssop ru -14 ad8608aruz - reel ? 40c to +125c 14- lead tssop ru -14 1 z = rohs compliant part, # denotes rohs compliant product (except for cb - 5 - 1) may be top or bottom marked . ? 2002 C 2013 analog devices, inc. all rights reserved. trademarks and registered trademarks are the property of their respective owners. d02731 - 0 - 4/13(n)

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